Logic Design Engineer – JR0015262
Pune, KA IN
Performs logic design, Register Transfer Level RTL coding, and simulation to generate cell libraries, functional units, and subsystems for inclusion in full chip designs. Participates in the development of Architecture and Microarchitecture specifications for the Logic components. Provides IP integration support to SoC customers and represents RTL team.
-Bachelors or Masters in EE/E&TC or CS/CE-Knowledge of Verilog/VHDL is must, knowledge of system Verilog is plus-Familiarity with timing closure aspects and functional verification would be required-Able to understand high level hardware architecture specification and develop micro-architecture design document-Should work in RTL design and Verification team environment and be able to learn quickly the design flows, tools and tradeoffs-Experience in RTL design & functional Verification is certainly advantageous
Inside this Business Group
The Data Center Group (DCG) is at the heart of Intel’s transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world.